Wei-Chih Lin
University of Southern California at Qualcomm
Based in Santa Clara, United States
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Seniority
Staff
Department
Education
Location
Santa Clara
Industry
Semiconductor Manufacturing
Company size
58K
Contact information
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w•••••••@qualcomm.com
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Background
About Wei-Chih Lin
About me & what I’m looking for: Hi! I’m Wei-Chih. I have experience in digital design using Verilog and SystemVerilog. More projects details below. Looking ahead, I’m eager to learn more practical and advanced skills to improve myself in my field further. Becoming a top-notch engineer is my top priority in life. If you're interested, feel free to see my projects on Github: I’m looking for DigitalCircuit Design Engineer, Design Verification and DFT Engineer roles. I’m open to roles in the United States. Professional Summary: Innovative and detail-oriented digital design engineer with strong RTL experience in Network-on-Chip architectures, FSMs, synchronous FIFOs, and asynchronous circuit design using Verilog and SystemVerilog. Skilled in UVM-based verification to ensure functional correctness and coverage closure. DFT/ATPG to find a stuck-at fault in different scale circuits, achieving high fault coverage. A solid foundation in ASIC design flow from RTL to GDSII experience, achieving digital circuit optimization on timing with no violations and area reduction
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