William Siddeley
Senior Silicon Design Engineer at Amd
Based in Etobicoke, Canada
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Seniority
Staff
Department
Engineering
Location
Etobicoke
Industry
Semiconductor Manufacturing
Company size
62K
Contact information
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w•••••••@amd.com
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Background
About William Siddeley
Senior Silicon Engineer at AMD, doing both full-stack development of a regression management platform and design verification of AMD's Display IP- Architect and maintain systems for metrics collection, coverage analysis, and regression flows - Develop integrations and automations with Synopsys tooling (VCS, URG, Verdi, ICO / VSO)- End-to-end verification of Display IP through UVM SystemVerilog testbenches, ensuring functional correctness and performance - Collaborate cross-functionally with design verification teams to optimize verification infrastructure - Strong focus on scalability and reliability
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