Yite Lee
韌體工程師 at Silicon Motion
Based in Hsinchu City, Taiwan
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Seniority
Staff
Department
Engineering
Location
Hsinchu City
Industry
Semiconductor Manufacturing
Company size
924
Contact information
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y•••••••@siliconmotion.com
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Background
About Yite Lee
My experience can be broadly divided into two periods:1. Semiconductor Fundamental Research : 20162021During my time at NCTU (National Chiao Tung University), I collaborated with Academia Sinica and TSMC to conduct fundamental research on two-dimensional semiconductor devices.1Focused on improving the mobility of two-dimensional semiconductor materials.2Investigated the specific relationship between 1/f low-frequency noise and internal defects in semiconductors.3Familiar with certain semiconductor fabrication processes, including photolithography using photonic and electron beams, metal deposition (sputtering and evaporation), etching, and more.4Experienced in setting up and analyzing electrical measurements for semiconductors, including noise analysis in two-dimensional materials, semiconductor contact resistance, Hall effect magnetic field modulation, and low-temperature (4K) experiments.5Managed the operation and maintenance of laboratory equipment and the liquid helium recycling system.2. SSD Firmware Development and Maintenance : 20221Independently developed the entire system block information recording function, including erase/write/read methods, and handled special power-on-reset (POR) and sudden power-off reset (SPOR) scenarios with backup mechanisms to prevent data loss.2Independently developed SSD test firmware for production lines and performed maintenance, including establishing the entire backend erase/write/read functions and defining error handling procedures.3Organized NAND command sequences to balance speed and power consumption in the backend while avoiding large transient currents caused by simultaneous NAND executions.4Worked with Marvell and Ranier SOCs, developing in environments with two CPUs and four CPUs, respectively.5Allocated memory usage between DRAM, SRAM, ITCM, and DTCM, organizing data accordingly.6Independently analyzed the characteristics of NAND and DRAM chips and investigated the causes of failure behaviors.7SATA Link Settings : Addressed unstable link issue at the SATA front-end.
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