Yusuke Kobayashi

Background

About Yusuke Kobayashi

SUMMARY OF QUALIFICATIONS - Developed bitcoin mining ASIC and hardware while established new company, SBI Mining Chip - Acquired the expert knowledge about the transaction protocol for Crypto mining - Gained over 13 years of experience in Design, Assessment and analysis of High-Performance-Computing at NEC, and developed large-scale ASIC and FPGA with logical design and physical validation- Acquired over 5 years of experience in High-end FPGA devices, Stratix series of Altera with the development of its power up sequence on PCB with the embedded controller, CPLD- Developed expert knowledge in both software and hardware through the ground design experience in the NEC SX series, which consist of Computer Architecture, Instruction Set, and Logical Specification design- Gained capabilities in leading the start-up team through the experience of leading and promoting 5 start-up projects at NEC- Developed excellent skills to communicate with vendors across the globe - Acquired technical expertise in programming (Verilog, C/C++, Python, Perl, Yaml) and utilized tools such as Synopsys, Cadence, Altera- Gained intermediate English language skills to engage in communication and conduct duties- Formed a professional affiliation as an expert committee member in the Technical Committee on Reconfigurable Systems (RECONF), IEICE. SKILLS - Programming: Verilog, C/C++, Python, Perl, MPI(Message Passing Interface) library, Yaml- Tools: Synopsys, Cadence, Altera SPECIALTIES - LSI logical verification and LSI design with Verilog etc- HPC architecture and instruction-set development- Crypto pool/miner development LANGUAGES - Japanese: Native- English: Intermediate Level (working, actively studying).