Eric Ponsot

Background

About Eric Ponsot

World wide recognized in TI and EDA companies for my physical design skills. Recognized as a key player at Samsung SFRC.+ Large expertise in IP or SOC designs in TI. Ability to deal with all steps of complex Samsung and TI design flows with various EDA tool (Synopsys tool suite (including MAGMA product), Cadence tool suite).+ Good knowledge of Exynos, OMAP hardware architecture (lead first OMAP product, owning top level spec), and well understanding of needs for high performance design, and low power design.+ Knowledgeable in CPU architecture (I've been working on cDSP C55X architecture definition, control flow description in RTL, and part of the team who developped the C model cycle accurate of this processor)+ Ability to lead projects, and good communication skills with partners (EDA vendors, world wide TI team environment)- Author or Co-authors of several papers presented during TI Internal conferences, and external conferences (SNUG/MUSIC)- Co Authored a paper presented to MUSIC conference in Bangalore, received “Best Paper Music Award” in 2010 - Author & Co-author of 6 patents, including one incentive award. Member of several internal technical committees + TI Physical Design symposium since 2007 + TI Interconnect Symposium since 2007, session chair in 2007 + TI ICE Technical conference in 2012, backend session chair.