Marco Tiloca

Background

About Marco Tiloca

Marco Tiloca received the Bachelor's Degree and the Master's Degree (cum laude) in Computer Engineering from the University of Pisa (Italy) in 2006 and 2009. He received the Ph.D. Degree in Computer Engineering from the University of Pisa in 2013, with a focus on network and communication security in Wireless Sensor Networks. Currently, he is a Senior Researcher in the Cybersecurity Unit of RISE Research Institutes of Sweden in Stockholm (Sweden), where he was a Postdoctoral Research Fellow under the ERCIM Alain Bensoussan/Marie Curie Fellowship Programme, between 2013 and 2015. Marco Tiloca has experience in patent applications, and is actively involved in standardization activities under the Internet Engineering Task Force (IETF), especially in the Working Groups "Constrained RESTful Environments"(CoRE),"Authentication and Authorization for Constrained Environments"(ACE),"Lightweight Authenticated Key Exchange"(LAKE) and "Static Context Header Compression"(SCHC). In particular, he is Chair of the IETF Working Group "CoRE", as well as reviewer in the IETF Internet of Things Directorate and in the IETF Application and Real Time (ART) Area Review Team. His research interests are in the field of network and communication security, and include security in the Internet of Things, secure group communication, key management, and access control. Results of research activities in these areas have produced several publications in renowned international journals and conferences. He is currently involved in: the H2020 project "SIFIS-Home - Secure Interoperable Full-Stack Internet of Things for Smart Home" as Work Package Leader; and the SSF project "SEC4Factory - Cyber Security for Next Generation Factory" as member of the Steering Group and co-Principal Investigator. He was involved in: the VINNOVA Celtic-Next Project "CRITISEC - Critical Infrastructure Security" as Technical Coordinator, National Swedish Coordinator and Work Package Leader; the VINNOVA Collaborative Project "Secure Group Communication for IoT", as Project Coordinator and Work Package Leader; the VINNOVA Project "SecureCare - Secure and Reliable IoT for Better Living in Elderly Care"; the EIT-Digital High Impact Initiative "Advanced Connectivity Platform for Vertical Segments" as Work Package Leader; the FP7 European Project SEGRID as Work Package Leader; the FP7 European Network of Excellence CONET; the FP7 European Project PLANET; and the Italian PRIN Project TENACE.