Massimo Beninich

Background

About Massimo Beninich

Almost 20 years experience on cellular modules SW/FW development, with different covered roles (developer, feature leader, team leader). Contributed to development of most of u-blox cellular modules, in the baseband drivers and middleware application (Serial I/O, Power deamon) area. More than 15 years experience on serial Interfaces (UART, RS232, USB) programming and interfacing, in the scope of local connectivity between the cellular modules and the HOST/MCU. Most of them in the role of "feature leader". Expertise in UICC technology as developer and technical responsible of eUICC solution (GSMA RSP SGP.32 IoT and legacy specs) Good knowledge of electronic and telecommunication basics and SW design practices. Good understanding of HW schematic and knowledge of basic HW blocks composing a cellular module. Team Leading (5-7 SW engineers team, peripheral drivers area) since end of 2023. Experience on- Cellular modules technology - Embedded systems programming and baseband drivers development (UART, GPIOs, HW timers,SPI, UART)- HW Lab equipment for monitoring and debugging (scope, multimeter, logical analyzer, JTAG)- Networking and data path dial-up, virtual ethernet over USB)- Real Time Operating systems (FreeRTOS, ThreadX, Nucleus) and Linux embedded - SIM/USIM/eUICC driver and stack (including Remote SIM provisioning): contribution to the full development and maintenance of SIM/UICC driver for the u-blox LPWA chipset- Device Drivers Architecture and development on ARM SoCs - SW version control tools (Rational ClearCase, Perforce,Git)- Issue tracking and project management tool (JIRA, SWARM)- System debugging on ARM cortex Programming languages- C, C++- Python - Assembler Interested in discovery new fields and applications (data science, machine learning, industrial automation, etc.)