Tejas Hande

Soc Design Engineer at Altera

Based in Bengaluru, India

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Seniority

Staff

Department

Engineering

Location

Bengaluru

Industry

Semiconductor Manufacturing

Company size

1.9K

Contact information

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Email

1 credit

t•••••••@intel.com

Phone

5 credits

+91 ••• •••• ••••

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Background

About Tejas Hande

As a SoC Design Engineer at Intel Altera, I am part of the Design team for the FPGAs. I apply my knowledge and skills in VLSI Technology and Embedded Systems, which I gained from my MTech program at COEP Technological University. Previously, I was a Project Intern at Tata Motors, where I was a part of the Digital Transformation and Change Management Department of the GDC (Global Delivery Center). I did my undergraduate in Electronics and Telecommunication Engineering at MIT Academy of Engineering, Alandi, Pune. I took part in several projects and competitions, such as SAE-BAJA and Enduro Student India. I was part of Team Niyudrath Racing, a college ATV (All Terrain Vehicle) design group, where I worked on the design and integration of the electronic components and systems of the ATV. I aspire to become a proficient and innovative engineer in the field of VLSI and Embedded Systems.

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