Thierry Besson
Principal Engineer at Zero Asic
Based in Antibes, France
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Seniority
Director
Department
Engineering
Location
Antibes
Industry
Semiconductor Manufacturing
Company size
11
Contact information
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t•••••••@zeroasic.com
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Background
About Thierry Besson
35 years of expertise in EDA : Logic Synthesis, HDL Synthesis, Standard cells and FPGA back-end synthesis, Formal Verification, STA, P&R, Area/Timing and Power Optimizations, …, with strong background in C/C++ especially on UNIX/LINUX Platform, in Core Algorithmic and Data-Structures concepts, in Software Design Methodologies, strong commitment on project deliveries, several Management and Technical Leader experiences in an International environment.
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